This universal processor combines CPU, GPU, DSP and FPGA in one chip

Web Hosting & Remote IT Support

---

• One processor architecture for AI, embedded systems, and robotics
• RISC-V scalability ensures seamless expansion across diverse applications
• Seed funding boosts Ubitium’s drive to redefine chip technology

---

For over 50 years, the semiconductor industry has relied on the Tomasulo algorithm, introduced by IBM in 1967, to build specialized CPUs, GPUs, and other chips tailored to specific computing tasks.

Now, Ubitium, a hardware startup founded by semiconductor veterans, has developed a universal RISC-V processor that consolidates all computing workloads onto a single, affordable chip.

This technology is particularly significant for embedded systems and robotics, where the cost of hardware often limits the deployment of advanced computing solutions.

Erasing the boundaries between specialized computing tasks

Ubitium’s universal processor is designed to be scalable, supporting a portfolio of chips that vary in size but share the same microarchitecture and software stack, ensuring customers can expand their applications without altering their development processes.

The processor’s workload-agnostic design makes it suited to any computing task and helps to simplifying hardware requirements.

Ubitium has raised $3.7 million in seed funding, which will accelerate the development of prototype chips and initial development kits, with plans to launch the first commercial processors by 2026.

"The $500 billion processor industry is built on restrictive boundaries between computing tasks," noted Hyun Shin Cho, CEO of Ubitium.

"We're erasing those boundaries. Our Universal Processor does it all - CPU, GPU, DSP, FPGA - in one chip, one architecture. This isn't an incremental improvement. It is a paradigm shift. This is the processor architecture the AI era demands."

Cho further stated the company envisions a future where a single processor design can handle tasks ranging from small embedded systems to high-performance computing without specialized hardware modifications.

“For too long, we’ve accepted that making devices intelligent means making them complex. Multiple processors or processor cores, multiple development teams, endless integration challenges—today, that changes," he added.

You may also like

• What is an NPU: the new AI chips explained
• These are the best AI tools
• EU reveals sites for major AI factories across Europe

via Hosting & Support